In fabricating semiconductor devices, trenches are formed in a semiconductor substrate to isolate active devices therein, or serve in part as a structure for fabricating dynamic random access memory (DRAM). The process for fabricating the trench typically includes defining an opening of the trench through a photolithography process and performing an anisotropic etching. Subsequent processes may be carried out according to the material characteristics of the semiconductor device.
FIGS. 1 to 4 are cross-sectional views of a conventional semiconductor structure 10 illustrating deep trenches formed in a semiconductor substrate 12 by a known method. As shown in FIG. 1, a conventional method of forming the deep trenches in the semiconductor substrate includes forming a pad oxide layer 14 on the semiconductor substrate 12 of the semiconductor structure 10, depositing a pad nitride layer 16 on the pad oxide layer 14 and depositing a borosilicate glass (BSG) layer 18 on the pad nitride layer 16. The borosilicate glass layer 18 will serve as a hard mask in subsequent deep trench silicon etching process. An un-doped silicate glass layer 20 is deposited on the borosilicate glass layer 18 for the purpose of anti-humidity and protection. The structure 10 is then subject to an annealing process. Subsequently, a photolithography process is imposed on the structure 10, which includes coating a photoresist layer 22 on the un-doped silicate glass layer 20, patterning and exposing the photoresist layer 22, and removing a portion of the photoresist layer 22 to form openings 24, so as to facilitate the formation of desired deep trenches 28 residing at the position shown by the dashed lines 26 under the openings 24.
As shown in FIG. 2, after etching process, the un-doped silicate glass layer 20 beneath the openings 24, the borosilicate glass layer 18, the pad nitride layer 16, the pad oxide layer 14 and semiconductor substrate 12 are etched away, and then deep trenches 28 are formed at the position shown by dashed lines 26 of FIG. 1. In addition, the photoresist layer 22 and the un-doped silicate glass 20 have been removed as well. The etching process includes removing the un-doped silicate glass layer 20 beneath the opening 24, the borosilicate glass layer 18, the pad nitride layer 16 and the pad oxide layer 14 by known anisotropic etching process. The silicon substrate 12 no longer covered by the hard mask may be etched by dry etching process known in the art.
After the deep trenches have been formed, the borosilicate glass layer 18 in FIG. 2 is removed. As shown in FIG. 3A, when using the vapor of hydrogen fluoride (VHF) to remove the borosilicate glass layer 18, it is difficult to completely remove the borosilicate glass layer 18 away, such that a portion of the borosilicate glass layer 18 still remains thereon. This is because when performing the aforementioned annealing process, due to elevated temperature, the boron in the borosilicate glass layer 18 would tend to diffuse upward from the junction of the borosilicate glass layer 18 and pad nitride layer 16 (i.e., toward the direction of the un-doped silicate glass layer 20 of FIG. 1), such that the region in the borosilicate glass layer 18 adjacent to the junction forms an un-doped silicate glass layer. In comparison with a doped silicate glass layer, the un-doped silicate glass layer is more difficult to be removed by using the vapor of hydrogen fluoride.
On the other hand, when utilizing liquid hydrogen fluoride (HF) to etch the borosilicate glass layer 18, undercut 17 would form in the pad oxide layer 14, as shown in FIG. 3B. The results shown in both FIGS. 3A and 3B adversely influence the subsequent processes, increase the fabrication costs and may degrade the fabrication yields. Therefore, we do not desire these to occur.
Attempt has been made to avoid the conditions shown in FIGS. 3A and 3B by omitting the annealing process in the aforementioned trench forming process, however, this would result in defective profiles of the deep trenches. It is believed that the annealing process is carried out to facilitate obtaining better profile of deep trenches after performing the deep trench etching steps. However, the approach of omitting the annealing process to prevent the boron in the borosilicate glass layer 18 from diffusing upward, in order to obtain better hard mask removal, would result in abnormal critical dimensions of the deep trenches for the 0.11-micron technology generation, for example, inconsistent width of deep trenches 28′ and 28″ as depicted in FIG. 4.
It is desirable to provide a method and structure for forming deep trenches in a semiconductor substrate which ensure good profile of the deep trenches and easy removal of the hard mask.